An ordered and stable silicon (Si) surface is most desirable for subsequent epitaxial growth of single crystal thin films on silicon for numerous device applications, e.g., ferroelectrics or high dielectric constant oxides for non-volatile high density memory and next generation MOS devices. It is pivotal to establish an ordered transition layer on the Si surface, especially for subsequent growth of single crystal oxides, e.g., perovskites.
Some reported growth of these oxides, such as BaO and BaTiO.sub.3 on Si (100) were based on a BaSi.sub.2 (cubic) template by depositing one fourth monolayer of Ba on Si (100) using molecular beam epitaxy at temperatures greater than 850.degree. C. See for example: R. McKee et al., Appl. Phys. Lett. 59(7), pp. 782-784 (Aug. 12, 1991); R. McKee et al., Appl. Phys. Lett. 63(20), pp. 2818-2820 (Nov. 15, 1993); R. McKee et al., Mat. Res. Soc. Symp. Proc., Vol. 21, pp. 131-135 (1991); U.S. Pat. No. 5,225,031, issued Jul. 6, 1993, entitled "PROCESS FOR DEPOSITING AN OXIDE EPITAXIALLY ONTO A SILICON SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS"; and U.S. Pat. No. 5,482,003, issued Jan. 9, 1996, entitled "PROCESS FOR DEPOSITING EPITAXIAL ALKALINE EARTH OXIDE ONTO A SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS". A strontium silicide (SrSi.sub.2) interface model with a c(4.times.2) structure was proposed. See for example: R. McKee et al., Phys. Rev. Lett. 81(14), 3014 (Oct. 5, 1998). However, atomic level simulation of this proposed structure indicates that it likely is not stable at elevated temperatures.
Growth of SrTiO.sub.3 on silicon (100) using an SrO buffer layer has been accomplished. See for example: T. Tambo et al., Jpn. J. Appl. Phys., Vol. 37 (1998), pp. 4454-4459. However, the SrO buffer layer was thick (100 .ANG.), thereby limiting application for transistor films, and crystallinity was not maintained throughout the growth.
Furthermore, SrTiO.sub.3 has been grown on silicon using thick oxide layers (60-120 .ANG.) of SrO or TiO.sub.x. See for example: B. K. Moon et al., Jpn. J. Appl. Phys., Vol. 33 (1994), pp. 1472-1477. These thick buffer layers would limit the application for transistors.
Therefore, a method for fabricating a thin, stable crystalline silicate interface with silicon is needed.